The Integrated Electronics group at the Department of Engineering carries out and establishes cutting-edge research and education in the area of integrated electronics at both circuit and device level, with focus on low-power, low-voltage and high-performance integrated circuits (IC) and systems for emerging energy-efficient applications. The main focus of the Integrated Electronics group in Integrated Circuits and Electronics Lab (ICE-LAB). The ICE-LAB is to develop new techniques to address the energy-efficiency and reliability of digital and mixed-signal systems.
Designing energy-efficient integrated circuits for portable devices leads to achieve a longer battery lifetime. Lowering the supply voltage is the most efficient way to reduce the dynamic power consumption of a digital circuit. However, scaling the supply voltage is limited by scaling the threshold voltage of the transistors due to the exponential increase in leakage current. Therefore, new methodologies from circuit to architecture level are required to reduce the total power consumption of such an electronic system that improves the portability of the device with a longer battery lifetime. All in all, the main focus of the ICE-LAB through this research is to achieve ultra-low power portable green electronics.
The demand for smaller portable electronics with higher functionality, higher performance and lower power budget is increasing significantly. Due to the challenges in CMOS scaling, researchers are looking at other candidates with less process variation, improved performance and more scalability. Among different candidates, devices like FinFET have shown promising results to replace planar CMOS technology giving better sub-threshold control and therefore reducing leakage with the added benefits of less process variation and better drivability. However, FinFET is still facing different challenges and it needs to be optimised further to be used in all types of electronic devices. Challenges such as increased parasitics, quantised sizing, mechanical stability and reliability issues have raised worries for a technology shift from Planar CMOS to FinFET. In the Integrated Electronics group, we explore different solutions from device to circuit/architecture level to lower the power consumption and improve the performance of the designed circuits. Other devices such as spinFETs, Gate-All-Around (GAA) and Vertical FETs (VFET) are researched. In our group, we are looking at designing a new magnetic-tunneling-junction (MTJ) device for biosensing.
Electronic devices are becoming more and more complicated. Therefore, larger memory is required to store the obtained huge amount of data. In current technology nodes, memory arrays are taking up to 50% of the whole area and more than 70% of the total power consumption of a chip. In our group, we explore different techniques from device to cell level to optimise memories (with focus on SRAM) for low power and high-performance applications. The focus of our work is on CMOS and FinFET SRAMs and Spin-Torque Transfer Memory (STT-RAM) design. Some designs, such as asymmetrically doped FinFET devices, Multi-Level Wordline Driver, Asymmetric SRAM cell with write assist techniques, novel 7T, 8T and 9T SRAM cells using CMOS and FinFET technologies, etc., have been designed and published in different journals and conferences.
Another research area in our group is to design low power analog circuit for biomedical applications. Biosensing requires very low noise analog front-end circuits with the possibility of extremely low power. We design different analog blocks such as low noise amplifiers, ADCs, DACs, etc. at very low voltages with ultra-low power consumption.